1. Field of the Invention
This invention relates to a semiconductor device and a method of manufacturing the same in which electrode pads which are not connected by wires to leads are ball-bonded.
2. Description of the Related Art
FIG. 5 is a perspective view of a resin molded semiconductor device of, for example, a DIP (dual inline package) type. In this DIP type semiconductor device 100, outer leads portions 6b of leads 6 extend from two side surfaces of a resin molded portion 10. As shown in FIG. 6, a silicon (Si) substrate 1 of a semiconductor chip that is molded in the resin molded portion 10, has inner lead portions 6a of the leads 6 formed continuously with the outer leads 6b extend in the resin molded portion 10 to a position in the vicinity of the silicon (Si) substrate 1. Electrode pads 3 provided on the major surface of the Si substrate 1 and the inner lead portions 6a of the leads 6 are connected by thin wires 40. The Si substrate 1 is die-bonded (fixed) to a die pad 2. An electric circuit (not specifically illustrated) is formed by patterning on the major surface of the Si substrate 1. An internal wiring is provided by using aluminum (Al) members, and aluminum (Al) pads 3, i.e., the electrode pads for exchange of electrical signals between the Si substrate 1 and the outside are provided. The Al pads 3 are electrically connected to the inner lead portions 6a of the leads 6 by thin wires, e.g., gold (Au) wires 40. Au balls 41 are formed on the extreme ends of the Au wires 40 on the Al pad 3 side. The Au balls 41 are press-bonded to the Al pads 3. The ends of the Au wires 40 on the inner lead 6a side are bonded to the inner lead portions 6a by being simply pressed against the same. FIG. 6A shows a bonded state of each Au wire 40 in section. All the Si substrate 1, the die pad 2, the Au wires 40 and the inner lead portions 6a of the leads 6 are resin-molded in the resin molded portion 10 after wire bonding, as shown in FIG. 5. To minimize the influence of stresses applied from the resin as well as the influence of chemical substances, the surface of the Si substrate 1 is entirely coated with glass (SiO.sub.2 film) 1a, except for the Al pads 3.
Next, a method of manufacturing the conventional semiconductor device will be described below with reference to FIGS. 7(a) to 7(e) which shows steps of a wire bonding process in which the Al pads on the Si substrate 1 and the inner lead portions 6a are connected by using an Au wire material 4 (hereinafter referred to simply as "Au wire").
First, as shown in FIG. 7(a), an Au wire 4 passing through a capillary tip 7 has an Au ball 41 formed at its extreme end. A clamper 9 provided above the capillary tip 7 is operated to clamp the Au wire 4 and is moved downward together with the capillary tip 7 so that the Au ball 41 is moved downward to the selected one of the Al pads 3 on the Si substrate 1 fixed on the die pad 2 by a die bonding agent 5. At this time, the die pad 2 and the inner lead portions 6a are fixed on a heat block (not shown) and are heated to 250.degree. to 300.degree. C. Next, as shown in FIG. 7(b) (in which the clamper is not shown), the capillary tip 7 is operated to impose a load of 50 to 60 g upon the Au ball 41 on the Al pad 3 while applying ultrasonic vibration thereto so that the Au ball 41 is plastically deformed and press-bonded to the Al pad 3. Next, the clamper 9 is opened to release the press-bonded Au ball 41 and is moved upward together with the capillary tip 7. As shown in FIG. 7(c), Au wire 4 is thereby paid out from the end of the capillary tip 7. The clamper 9 and the capillary tip 7 are further moved toward the inner lead 6a. As shown in FIG. 7(d), a load of 50 to 60 g and ultrasonic vibration are applied to the Au wire on inner lead 6a by the capillary tip 7, thereby press-bonding the inner lead 6a and the Au wire 4. At this time, no Au ball is formed. Thereafter, as shown in FIG. 7(e), the clamper (not shown) is operated to clamp the Au wire 4 and is, in this state, moved upward together with the capillary tip 7 to break the Au wire 4, thereby forming the Au wire 40. A high voltage (about 2,000 volts) is applied between the Au wire 4 thereby formed and a torch rod 8 to effect an electric discharge therebetween so that the Au wire 4 is melted, thereby forming a new Au ball 41.
By repeating this process, the Al pads on the Si substrate and the inner leads can be connected by Au wires as desired. The Al pads on the Si substrate and the inner leads are not connected in a one-to-one relationship by wires some of the Al pads may not have a wire-bonded connection. In particular, pads are often left without a wire-bonded connection in some types of ASICs (application specific ICs) which have recently been in demand, for example, those in which the number of I/O ports is selected by wire bonding connections (that is, of the pads provided, only necessary ones are bonded), or in DRAMs (dynamic RAM) or the like in which Al pads to be wire-bonded are changed according to the use of the semiconductor device (that is, a plurality of arrays of pads are provided and electrode pads of some of the pad arrays disposed at suitable positions according to use are selectively used).
A moisture resistance test of a type of a conventional semiconductor device having Al pads not having a wire-bonded connection has revealed that this type of device deteriorates faster than the type in which all Al pads are wire-bonded. FIG. 8 shows the vicinity of Al pads of the type of semiconductor device having a pad without a wire bond before the moisture resistance test, and FIG. 9 shows the vicinity of the Al pads observed by opening the molded resin of the semiconductor element deteriorated by the moisture resistance test. As shown in FIG. 9, corroded portion 11 of the Al pads extends from an Al pad 3a which is not wire-bonded to an internal portion of an Al wiring 12 connected to this pad. It is considered that this corrosion is caused by impurities in the resin (e.g., chlorine) and by water permeating from the outside, and that in the case of the Al pad without a wire bond, the non-bonded opening area is so large that the corresponding Al pad portion is corroded and forms large amounts of corrosion products which attack the internal Al wiring. In particular, the above-mentioned ASICs and DRAMs have very thin wiring (1.0 to 0.8 .mu.m) and the corrosion speed is high. The conventional semiconductor devices entail these drawbacks.